Waymo has publicly detailed a purpose-built 5nm application-specific integrated circuit designed for the compute system behind its autonomous vehicles. The ASIC processes high-volume data from cameras, lidar, and radar before that information reaches other parts of the Waymo Driver’s machine-learning stack.
What the Custom ASIC Does
Autonomous vehicles continuously receive raw information from multiple sensors. Processing all of that data with general-purpose hardware can increase latency, power consumption, and the amount of information that must move through the complete system.
Waymo says its custom ASIC is engineered to process and fuse raw sensor data while running specialized neural-network workloads in real time. Its accelerators extract useful information from camera, lidar, and radar streams before passing the results to the company’s purpose-built inference engine.
The design also performs temporal denoising, which uses information captured across multiple moments to improve perception in low-light conditions. Waymo says its latest compute system can process data from 13 high-resolution cameras simultaneously and in real time.
Understanding the 1,000-TOPS Figure
Waymo states that its ASICs collectively provide more than 1,000 TOPS of machine-learning performance for front-end processing and ML models. TOPS means trillions of operations per second, but the figure should not be treated as a complete measurement of real-world autonomous-driving performance.
Actual performance also depends on numerical precision, software efficiency, latency, workload type, sensor design, and how effectively each component is used. Waymo specifically notes that it optimizes the full stack for the low-batch workloads common in autonomous vehicles.
The figure is also not directly comparable with a centralized automotive system-on-chip that performs a broader set of driving and infotainment tasks. Waymo’s custom ASIC is one component in a heterogeneous system that also uses CPUs, GPUs, accelerators, and a separate inference engine.
Redundancy Across the Compute System
Waymo describes its onboard compute system as two independent engines operating in parallel. If one side experiences a fault, the other is designed to take over. This redundancy applies to the wider compute architecture and should not be interpreted as confirmation that a single ASIC contains two complete independent driving computers.
The system is also integrated with the vehicle’s liquid-cooling hardware and is designed to operate under vibration, shock, and large temperature changes.
Connection to the Sixth-Generation Waymo Driver
The technology is associated with Waymo’s latest autonomous-driving platform. The Ojai vehicle is the first platform to introduce the sixth-generation Waymo Driver to riders. Waymo initially planned limited rider access in San Francisco, Phoenix, and Los Angeles while collecting feedback before a wider rollout.
Waymo says it continues to work with companies including AMD, Micron, Nvidia, Samsung, SanDisk, Socionext, and TSMC. The company’s approach combines custom silicon with commercially available components instead of replacing every part of the compute stack with a single in-house chip.
Why the Design Matters
The announcement offers a clearer view of how Waymo divides autonomous-driving workloads. Specialized hardware handles demanding sensor and machine-learning operations, while other processors manage orchestration, data movement, logging, and additional tasks.
This division can improve efficiency and reduce the delay between a sensor detecting an object and the vehicle responding. However, Waymo has not published enough information for independent testing of the ASIC’s real-world performance, energy use, or manufacturing cost.
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